Status Update 2018-09-15
The last blog post is already a few months ago, and many things happened in the meantime. Thus I would like to inform you about the current status of the project, what happened in past and what the next tasks are.
Our logo was originally downloaded from a free icon portal. Although it was legal (thanks to its permissive license), it’s not a good idea to use a free icon as a logo. Because we didn’t have the copyright on it, it was not guaranteed to be exclusively used by us (other projects could use the same icon too).
Sure, it’s quite similar to the old logo, just nicer ;-) Probably that’s because I already liked the old logo, and maybe also a little bit because it was (too) hard for me to go with a completely different logo than the one we had for several years… Anyway, I hope you like the new logo as much as I do :)
It would be too much to explain all the changes from the last months, thus here just a list of the most important pull requests merged:
- Use Jinja-like attribute substitution syntax
- Improve PCB fabrication output generator
- Add ability to place NPTH drills on boards
- Implement airwires (aka “rats nests”)
- Provide installer for nightly builds
- Use Transifex for translations
- Bundle fonts used in schematics together with LibrePCB
- Add command-line tool “librepcb-cli”
- Refactor net segments concept and board/schematic editors
The last one sounds innocent, but that’s actually the change which (finally) made the board editor really usable (it fixed many annoying bugs).
With all the changes from above, our milestone 0.1 is nearly complete. That means that we are now feature-complete for our first release!
So you can expect the first official stable release very soon :-)
The open tasks are now:
- Define a development and release workflow
- Prepare and test file format upgrade procedure
- Review the whole file format and make the last changes if needed
- Create and publish the first release!
So, stay tuned :)